System requirements needed to interact with and visualize large, time-dependent data sets include a large, high-bandwidth disk array to store the entire data set being processed, a high speed network to download a problem set, a large, high-speed memory to buffer all data required to process a single simulation time step, computational power that is adequate to manipulate, enhance, and visualize the data sets, and a real-time, high resolution visual display. Furthermore, it is important that these functions be provided within a highly programmable and flexible user environment.
One fundamental problem encountered in multiprocessor systems is the provision of an efficient utilization of shared resources, such as a shared interconnect, or global bus, and a shared, global memory. It is desirable to operate such shared resources at their maximum bandwidth potential, while still providing reliable data transfers and storage. This problem is compounded when a variety of different types of agents, such as processors, I/O processors, and the like, are all coupled to the shared resources.
The following two commonly U.S. Patents are cited as showing multiple processor systems.
In commonly assigned U.S. Pat. No. 4,736,319, issued Apr. 5, 1988, entitled "Interrupt Mechanism for Multiprocessing System Having a Plurality of Interrupt Lines in Both a Global Bus and Cell Buses" to DasGupta et al. there is described a multiprocessing system that includes an executive processing element connected to a global bus. A plurality of cells, each of which includes plural processors, are connected through a plurality of bus interface systems to the global bus. A workstation is connected to the executive processor to input jobs into the multiprocessing system for execution.
In commonly assigned U.S. Pat. No. 4,862,350, issued Aug. 29, 1989, entitled "Architecture for a Distributive Microprocessing System" to Orr et al. there is described a shared memory system to interface a primary processor with a plurality of microprocessor control devices. The shared memory system includes a RAM and a dedicated processor for managing the RAM.
What is one object of this invention is to provide a multiprocessor system that efficiently utilizes shared system resources.
It is another object of the invention to provide a multiprocessor system optimized for providing high speed data interconnects enabling the real-time manipulation and display of complex, high resolution images.